The magnetic recording art has long known that narrow pulses in certain patterns of digital data signals experience pulse compression and other nonlinear pulse-edge displacement effects when stored magnetically on a disk drive or tape drive magnetic storage device (MSD). The resulting data read back from the MSD may have as much as a hundred times higher error rate than expected due to noise alone because the nonlinear pulse-edge displacement effects reduce the data detection system's margin for timing error. If pattern-dependent pulse-edge displacements can be ascertained for a particular medium used in a particular MSD, then it is possible to preshift the write data pulse edges by an amount equal, and opposite in direction to, that in which the medium will shift them, so that data with pulse-edge displacements reduced or eliminated will be read back from the MSD. Write precompensation, as selectively preshifting write data pulses or their edges is known, can decrease error rates enough to allow substantial MSD capacity gains. Particular algorithms for determining which pulse edges to shift are well known, and do not form a part of the present invention.
The capacity improvement obtainable for any algorithm depends strongly upon the accuracy of the time shifts delivered by the write precompensation circuit. The timing of write data pulse edges derives from a master clock. The write precompensation time shifts are typically small relative to the period of the master clock. Furthermore, the write precompensation time shifts should consistently be a specified percentage of the master clock period, which may itself vary due to environmental, process or other causes.
One conventional technique for obtaining time shifts and delays for this purpose is to use resistor-capacitor (RC) timing networks or other analog timing circuits. The performance achievable using this technique is severely limited by component tolerances and environmental factors such as temperature.
Another technique relies upon propagation delays provided by logic gates to determine time intervals of pulse edge shifts. However, logic-gate delays are inherently highly variable with environmental factors and process variations.
The above two techniques also suffer from not being closely tied to the period of the master clock. Therefore, the precompensation produced is one or more fixed time delays, rather than a delay which is a fixed percentage of the master clock, as would be more desirable.
A third method is to synchronize all signals to a write precompensation clock operating at a frequency high enough to allow all precompensation intervals to be specified in integral numbers of cycles of the precompensation clock. The precompensation clock could itself be synchronized with the master clock, for example using frequency synthesis techniques. However, at current disk-drive speeds, the precompensation clock would have to operate at 1 GHz or more. The logic gates, wiring, and shielding necessary for this frequency make this method currently impractical. Although circuit technology might advance to such speeds, advances in recording technology have historically and again in the future will undoubtedly raise the speed requirement at a comparable pace.